发明申请
- 专利标题: STRUCTURE FOR INTERCONNECT PARASITIC EXTRACTION
- 专利标题(中): 用于互连离散提取的结构
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申请号: US15241108申请日: 2016-08-19
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公开(公告)号: US20170053936A1公开(公告)日: 2017-02-23
- 发明人: Xingwei Peng , Wei Wang
- 申请人: Xingwei Peng , Wei Wang
- 优先权: CN201510514462.X 20150820
- 主分类号: H01L27/118
- IPC分类号: H01L27/118
摘要:
A structure for extracting interconnect parasitic in a ring oscillator is disclosed. The ring oscillator comprises multiple logical units connected in head to tail series. The structure comprises parasitic resistance sub-structures and/or parasitic capacitance sub-structures each connected to a corresponding logical unit. The structure can be used to determine errors in extracting parasitic resistance of polysilicon interconnects and metal interconnects, and/or errors in extracting parasitic capacitance between the polysilicon interconnects and between the metal interconnects. Therefore, the parasitic extraction error can be calibrated accordingly to obtain more precise circuit simulation results and more accurate device model and BEOL model.
公开/授权文献
- US09954001B2 Structure for interconnect parasitic extraction 公开/授权日:2018-04-24
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