An apparatus for performing secure memory allocation control in an electronic device and an associated method are provided. The electronic device may include a plurality of bus master circuits, each of which has capability of accessing data through a bus of the electronic device, and may further include a plurality of master side memory address filters (MAFs) that are coupled between the bus and the bus master circuits, where the apparatus may include a control circuit that is coupled to the master side MAFs. In addition, the control circuit may be arranged for controlling secure memory allocation of the electronic device through the master side MAFs, to restrict any unauthorized access to any portion of secure data within the electronic device. Additionally, the master side MAFs may be arranged for selectively restricting data accessing activities of the bus master circuits through memory address filtering.