Invention Application
US20170075720A1 Adaptive Techniques for Improving Performance of Hardware Transactions on Multi-Socket Machines
审中-公开
用于提高多插槽机器硬件交易性能的自适应技术
- Patent Title: Adaptive Techniques for Improving Performance of Hardware Transactions on Multi-Socket Machines
- Patent Title (中): 用于提高多插槽机器硬件交易性能的自适应技术
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Application No.: US15263123Application Date: 2016-09-12
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Publication No.: US20170075720A1Publication Date: 2017-03-16
- Inventor: Alex Kogan , Victor M. Luchangco , Yosef Lev , Trevor Brown
- Applicant: Oracle International Corporation
- Main IPC: G06F9/46
- IPC: G06F9/46 ; G06F9/50 ; G06F9/48

Abstract:
Socket scheduling modes may prevent non-uniform memory access effects from negatively affecting performance of synchronization mechanisms utilizing hardware transactional memory. Each mode may indicate whether a thread may execute a critical section on a particular socket. For example, under transitional lock elision, locks may include a mode indicating whether threads may acquire or elide the lock on a particular socket. Different modes may be used alternately to prevent threads from starving. A thread may only execute a critical section on a particular socket if allowed by the current mode. Otherwise, threads may block until allowed to execute the critical section, such as after the current mode changes. A profiling session may, for a running workload, iterate over all possible modes, measuring statistics pertaining to the execution of critical sections (e.g., the number of lock acquisitions and/or elisions), to determine the best performing modes for the particular workload.
Public/Granted literature
- US10127088B2 Adaptive techniques for improving performance of hardware transactions on multi-socket machines Public/Granted day:2018-11-13
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