- 专利标题: VOLTAGE REGULATOR WITH DROPOUT DETECTOR AND BIAS CURRENT LIMITER AND ASSOCIATED METHODS
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申请号: US14881498申请日: 2015-10-13
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公开(公告)号: US20170102724A1公开(公告)日: 2017-04-13
- 发明人: Sandor PETENYI
- 申请人: STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
- 主分类号: G05F1/575
- IPC分类号: G05F1/575
摘要:
A voltage regulator includes an input terminal to receive an input voltage, an output terminal to supply an output voltage, a power transistor, a differential amplifier, a driver, a dropout detector and a bias current limiter. The differential amplifier provides a drive signal based on a difference between a voltage reference and a feedback signal corresponding to the output voltage. The driver includes an impedance device, and a driver transistor that receives the drive signal so as to vary a bias current to a control terminal of the power transistor. The dropout detector and the bias current limiter is coupled to the input terminal, the impedance device, and the output terminal and includes first and second transistors coupled together, and a bias current generator coupled to the second transistor.
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