Invention Application
- Patent Title: METHOD OF FORMING DEEP TRENCH AND DEEP TRENCH ISOLATION STRUCTURE
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Application No.: US14883545Application Date: 2015-10-14
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Publication No.: US20170110409A1Publication Date: 2017-04-20
- Inventor: Fu-Chiang KUO , Ying-Hsun CHEN , Shih-Chi KUO , Tsung-Hsien LEE
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L21/306 ; H01L21/308
Abstract:
A method of forming a deep trench in a semiconductor substrate includes: forming a first mask pattern over the semiconductor substrate, in which the first mask pattern has a first opening exposing a portion of the semiconductor substrate; forming a second mask pattern over the first mask pattern, in which the second mask pattern has a second opening substantially aligned with the first opening to expose the portion of the semiconductor substrate, and the second opening has a width greater than a width of the first opening to further expose a portion of the first mask pattern; and removing the portion of the semiconductor substrate, the portion of first mask pattern and another portion of the semiconductor substrate beneath the portion of the first mask pattern to form the deep trench.
Public/Granted literature
- US09659874B2 Method of forming deep trench and deep trench isolation structure Public/Granted day:2017-05-23
Information query
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