Invention Application
- Patent Title: SEMICONDUCTOR DEVICES HAVING HYBRID STACKING STRUCTURES AND METHODS OF FABRICATING THE SAME
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Application No.: US15391424Application Date: 2016-12-27
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Publication No.: US20170110445A1Publication Date: 2017-04-20
- Inventor: PIL-KYU KANG , Byung Lyul Park , Taeyeong Kim , Yeun-Sang Park , Dosun Lee , Ho-Jin Lee , Jinho Chun , JU-IL CHOI , Yi Koan Hong
- Applicant: PIL-KYU KANG , Byung Lyul Park , Taeyeong Kim , Yeun-Sang Park , Dosun Lee , Ho-Jin Lee , Jinho Chun , JU-IL CHOI , Yi Koan Hong
- Priority: KR10-2014-0035382 20140326
- Main IPC: H01L25/00
- IPC: H01L25/00 ; H01L21/304 ; H01L23/48 ; H01L25/065 ; H01L21/66 ; H01L21/768 ; H01L23/00

Abstract:
A semiconductor device having a chip stack and an interconnection terminal is provided. The chip stack includes a first semiconductor chip, a second semiconductor chip and a third semiconductor chip stacked on each other. The interconnection terminal is electrically coupled to the chip stack. The first semiconductor chip includes a first front surface and a first backside surface. The second semiconductor chip includes a second front surface, a second backside surface, a second circuit layer and a through-electrode which is electrically coupled to the second circuit layer and penetrates the second semiconductor chip. The third semiconductor chip includes a third front surface, a third backside surface opposite to the third front surface and a third circuit layer adjacent to the third front surface. The first front surface and the second front surface face each other. The third front surface and the second backside surface face each other.
Information query
IPC分类: