Invention Application
- Patent Title: PROGRAMMABLE GAIN AMPLIFIER WITH ANALOG GAIN TRIM USING INTERPOLATION
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Application No.: US15258034Application Date: 2016-09-07
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Publication No.: US20170149397A1Publication Date: 2017-05-25
- Inventor: Aniruddha Roy , Nitin Agarwal
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Main IPC: H03G1/00
- IPC: H03G1/00 ; H03F3/45

Abstract:
Disclosed examples include programmable gain amplifier (PGA) circuits with an operation amplifier circuit having a first amplifier input and a second amplifier input including a plurality of second input nodes, a resistor array including a plurality of resistor sections connected in series with one another between the amplifier output and a reference voltage node, and a trim select circuit coupled between the second amplifier input and the resistor array circuit to deliver a feedback voltage signal to each individual one of the second input nodes from a given selected one of a plurality of the tap points of the resistor array circuit according to a trim code to provide analog gain trimming by interpolation.
Public/Granted literature
- US09692378B2 Programmable gain amplifier with analog gain trim using interpolation Public/Granted day:2017-06-27
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