Invention Application
- Patent Title: DISPLAY APPARATUS
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Application No.: US15409867Application Date: 2017-01-19
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Publication No.: US20170220153A1Publication Date: 2017-08-03
- Inventor: Gen KOIDE , Tadayoshi KATSUTA , Toshiaki FUKUSHIMA , Naoyuki OBINATA
- Applicant: Japan Display Inc.
- Priority: JP2016-014220 20160128
- Main IPC: G06F3/044
- IPC: G06F3/044 ; G06F3/041

Abstract:
A display apparatus which can reduce a parasitic capacitance during driving of driving electrodes based on a self-capacitance detecting method is provided. The display apparatus includes: a plurality of connection wires which are formed in a peripheral area and are connected to a plurality of corresponding video signal lines; a video signal line selection circuit which is connected with a plurality of connection wires, selects at least one connection wire and supplies a signal to the video signal lines; self-capacitance detection wires which extend in a direction intersecting an extension direction of the connection wires and intersects the connection wires; common wires which electrically connect the self-capacitance detection wires and drive electrodes; and transistors which are provided between the self-capacitance detection wires and the common wires. Further, the self-capacitance detection wires extend between a display area and the video signal line selection circuit in a plan view.
Public/Granted literature
- US10528196B2 Electronic device Public/Granted day:2020-01-07
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