- 专利标题: METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
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申请号: US15460069申请日: 2017-03-15
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公开(公告)号: US20170278952A1公开(公告)日: 2017-09-28
- 发明人: Tohru OKA , Nariaki TANAKA
- 申请人: TOYODA GOSEI CO.,LTD.
- 优先权: JP2016-059903 20160324
- 主分类号: H01L29/66
- IPC分类号: H01L29/66 ; H01L29/78 ; H01L29/207 ; H01L21/265 ; H01L21/225 ; H01L29/20 ; H01L21/266 ; H01L29/10
摘要:
A technique of suppressing the potential crowding in the vicinity of the outer periphery of a bottom face of a trench without ion implantation of a p-type impurity is provided. A method of manufacturing a semiconductor device having a trench gate structure comprises an n-type semiconductor region forming process. In the n-type semiconductor region forming process, a p-type impurity diffusion region in which a p-type impurity contained in a p-type semiconductor layer is diffused is formed in at least part of an n-type semiconductor layer that is located below an n-type semiconductor region.
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