Invention Application
- Patent Title: DEDUPE DRAM SYSTEM ALGORITHM ARCHITECTURE
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Application No.: US15162512Application Date: 2016-05-23
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Publication No.: US20170286004A1Publication Date: 2017-10-05
- Inventor: Chaohong Hu , Hongzhong Zheng , Krishna Malladi , Bob Brennan
- Applicant: Samsung Electronics Co., Ltd.
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
A deduplication memory module, which is configured to internally perform memory deduplication, includes a hash table memory for storing multiple blocks of data in a hash table array including hash tables, each of the hash tables including physical buckets and a plurality of virtual buckets each including some of the physical buckets, each of the physical buckets including ways, an address lookup table memory (ALUTM) including a plurality of pointers indicating a location of each of the stored blocks of data in a corresponding one of the physical buckets, and a buffer memory for storing unique blocks of data not stored in the hash table memory when the hash table array is full, a processor, and memory, wherein the memory has stored thereon instructions that, when executed by the processor, cause the memory module to exchange data with an external system.
Public/Granted literature
- US09966152B2 Dedupe DRAM system algorithm architecture Public/Granted day:2018-05-08
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