- 专利标题： Dummy Flip Chip Bumps for Reducing Stress
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申请号： US15646721申请日： 2017-07-11
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公开(公告)号： US20170309588A1公开(公告)日： 2017-10-26
- 发明人: Sheng-Yu Wu , Tin-Hao Kuo , Chita Chuang , Chen-Shien Chen
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 主分类号： H01L23/00
- IPC分类号： H01L23/00 ; H01L23/522 ; H01L23/532 ; H01L21/56 ; H01L23/58 ; H01L23/31 ; H01L21/60
摘要：
A device includes a metal pad over a substrate. A passivation layer includes a portion over the metal pad. A post-passivation interconnect (PPI) is electrically coupled to the metal pad, wherein the PPI comprises a portion over the metal pad and the passivation layer. A polymer layer is over the PPI. A dummy bump is over the polymer layer, wherein the dummy bump is electrically insulated from conductive features underlying the polymer layer.
公开/授权文献
- US10290600B2 Dummy flip chip bumps for reducing stress 公开/授权日：2019-05-14
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