- 专利标题: POWER FACTOR CORRECTION CIRCUIT AND METHOD
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申请号: US15673011申请日: 2017-08-09
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公开(公告)号: US20180054113A1公开(公告)日: 2018-02-22
- 发明人: Jintae KIM , Sangcheol MOON , Hangseok CHOI
- 申请人: FAIRCHILD SEMICONDUCTOR CORPORATION
- 申请人地址: US CA Sunnyvale
- 专利权人: FAIRCHILD SEMICONDUCTOR CORPORATION
- 当前专利权人: FAIRCHILD SEMICONDUCTOR CORPORATION
- 当前专利权人地址: US CA Sunnyvale
- 主分类号: H02M1/42
- IPC分类号: H02M1/42 ; H02M1/08 ; H02M7/06
摘要:
A Power Factor Correction (PFC) circuit comprises an oscillator circuit. The oscillator circuit receives a valley detect signal indicating a zero current condition, determines a blanking time according to an operational cycle of the PFC circuit, and determines to initiate the operational cycle according to the valley detect signal and the blanking time. Determining the blanking time comprises selecting one of a plurality of predetermined blanking times according to a count of operational cycles of the PFC circuit. The PFC circuit may operate in a Boundary Conduction Mode or a Discontinuous Conduction Mode depending on whether a charge-discharge period is greater than the blanking time. The PFC circuit may determine, according to its output voltage, a first duration of a charging period, determine a delay time according to zero current times of previous operational cycles, and extend the first duration of the charging period by the delay time.
公开/授权文献
- US10090757B2 Power factor correction circuit and method 公开/授权日:2018-10-02
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