Invention Application
- Patent Title: INTEGRATED CIRCUIT DEVICES AND METHODS OF ASSEMBLING THE SAME
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Application No.: US15269576Application Date: 2016-09-19
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Publication No.: US20180082981A1Publication Date: 2018-03-22
- Inventor: Arun Virupaksha Gowda
- Applicant: General Electric Company
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/528

Abstract:
An integrated circuit (IC) device is described. The IC device includes a substrate. A connection component including a cavity therethrough is attached to the substrate. A memory die is positioned in the cavity of the connection component and is electrically coupled to the substrate. A logic die extends over the memory die and at least a portion of the connection component, and is electrically coupled to the connection component and the memory die. The connection component is formed free of through silicon vias and is electrically coupled to the substrate through wire bonding.
Public/Granted literature
- US10068879B2 Three-dimensional stacked integrated circuit devices and methods of assembling the same Public/Granted day:2018-09-04
Information query
IPC分类: