发明申请
- 专利标题： BALANCER FOR MULTIPLE FIELD EFFECT TRANSISTORS ARRANGED IN A PARALLEL CONFIGURATION
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申请号： US15705718申请日： 2017-09-15
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公开(公告)号： US20180083611A1公开(公告)日： 2018-03-22
- 发明人: Adrian MIKOLAJCZAK , Chang Su MITTER
- 申请人： FAIRCHILD SEMICONDUCTOR CORPORATION
- 申请人地址： US CA Sunnyvale
- 专利权人： FAIRCHILD SEMICONDUCTOR CORPORATION
- 当前专利权人： FAIRCHILD SEMICONDUCTOR CORPORATION
- 当前专利权人地址： US CA Sunnyvale
- 主分类号： H03K17/06
- IPC分类号： H03K17/06 ; H03K17/30
摘要：
In at least one general aspect, an apparatus can include a first field effect transistor (FET) device and a second FET device. The apparatus can include a characterization circuit coupled to the first FET device and the second FET device where the characterization circuit can be configured to characterize a responsiveness of each of the first FET device and the second FET device. The apparatus can include a balancer configured to produce a modified gate drive signal for the first FET device based on the responsiveness of the first FET device.
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