Invention Application
- Patent Title: POWER TRANSISTOR WITH TERMINAL TRENCHES IN TERMINAL RESURF REGIONS
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Application No.: US15427489Application Date: 2017-02-08
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Publication No.: US20180226502A1Publication Date: 2018-08-09
- Inventor: Hideaki Kawahara , Christopher Boguslaw Kocon , Seetharaman Sridhar , Simon John Molloy , Satoshi Suzuki
- Applicant: Texas Instruments Incorporated
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/10 ; H01L29/40

Abstract:
A device includes a transistor formed on a substrate. The transistor includes an n-type drain contact layer, an n-type drain layer, an oxide layer, a p-type body region, a p-type terminal region, body trenches, and terminal trenches. The n-type drain contact layer is near a bottom surface of the substrate. The n-type drain layer is positioned on the n-type drain contact layer. The oxide layer circumscribes a transistor region. The p-type body region is positioned within the transistor region. The p-type terminal region extends from under the oxide layer to an edge of the transistor region, thereby forming a contiguous junction with the p-type body region. The body trenches is within the transistor region and interleaves with the p-type body region, whereas the terminal trenches is outside the transistor region and interleaves with the p-type terminal region.
Public/Granted literature
- US10256337B2 Power transistor with terminal trenches in terminal resurf regions Public/Granted day:2019-04-09
Information query
IPC分类: