- 专利标题： SEMICONDUCTOR PACKAGE WITH A WIRE BOND MESH
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申请号： US15896860申请日： 2018-02-14
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公开(公告)号： US20180233422A1公开(公告)日： 2018-08-16
- 发明人: Siva Prakash Gurrum , Amit Sureshkumar Nangia
- 申请人： Texas Instruments Incorporated
- 主分类号： H01L23/16
- IPC分类号： H01L23/16 ; H01L23/495 ; H01L23/00
摘要：
A semiconductor package includes a lead frame having a die attach pad and a plurality of leads. A die is attached to the die attach pad and the electrically connected to the plurality of leads. The die includes a plurality of bond pads along a periphery of the die and a bond pad strip surrounding a circuit in the die. A first plurality of bond wires is bonded between first opposite sides of the bond pad strip. The first plurality of bond wires is aligned in a first direction. A second plurality of bond wires is bonded between second opposite sides of the bond pad strip. The second plurality of bond wires is aligned in a second direction. Mold compound covers portions of the lead frame, the die, the bond pad strip, the first plurality of bond wires and the second plurality of bond wires.
公开/授权文献
- US10204842B2 Semiconductor package with a wire bond mesh 公开/授权日：2019-02-12
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