Synchronized multiple channel lock-in amplifier
Abstract:
The disclosure relates to a lock-in amplifier comprising a plurality of channels (CH1-CHN), wherein each channel of the plurality of channels (CH1-CHN) is configured to receive an input signal (Sin1-SinN) and generate at least one output signal (Sout1-SoutN), a synchronization unit (110) configured to synchronize the generated output signals (Sout1-SoutN) of the plurality of channels (CH1-CHN), an aggregation module (150) configured to receive the generated output signals (Sout1-SoutN) and generate an aggregated signal (Sagg) based on the generated output signals (Sout1-SoutN).
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