- 专利标题: JTAG LOCKOUT FOR EMBEDDED PROCESSORS IN PROGRAMMABLE DEVICES
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申请号: US15482336申请日: 2017-04-07
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公开(公告)号: US20180292458A1公开(公告)日: 2018-10-11
- 发明人: Kirk A. Lillestolen , Kanwalpreet Reen
- 申请人: Hamilton Sundstrand Corporation
- 主分类号: G01R31/3185
- IPC分类号: G01R31/3185 ; G06F11/25
摘要:
A Joint Test Action Group (JTAG) communication lockout processor is disclosed. The processor is configured to generate a multi-channel unlock sequence based on an operational mode change of an operably connected programmable device, and save the unlock sequence to one or more memory registers. The processor can also receive an execution of the multi-channel unlock sequence via two or more unlock channels, determine, via an unlock logic, whether the execution of the multi-channel unlock sequence is valid, and responsive to determining that the execution of the multi-channel unlock sequence is valid, allow or disallow the JTAG communication with an embedded processor.
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