- 专利标题: ISOLATED SEMICONDUCTOR LAYER IN BULK WAFER BY LOCALIZED SILICON EPITAXIAL SEED FORMATION
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申请号: US16027522申请日: 2018-07-05
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公开(公告)号: US20180315816A1公开(公告)日: 2018-11-01
- 发明人: Daniel Nelson Carothers , Jeffrey R. Debord
- 申请人: TEXAS INSTRUMENTS INCORPORATED
- 主分类号: H01L29/06
- IPC分类号: H01L29/06
摘要:
An integrated circuit may be formed by forming a buried isolation layer in an isolation recess in a single-crystal silicon-based substrate. Exposed lateral surfaces of the substrate at the buried isolation layer are covered with a dielectric sidewall. A seed trench is formed through the buried isolation layer to expose the substrate. A single-crystal silicon-based seed layer is formed through the seed trench, extending above the top surface of the buried isolation layer. A silicon-based non-crystalline layer is formed contacting the seed layer. A cap layer is formed over the non-crystalline layer. A radiant-induced recrystallization process converts the non-crystalline layer to a single-crystal layer aligned with the seed layer. The cap layer is removed and the single-crystal layer is planarized, leaving an isolated semiconductor layer over the buried isolation layer.
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