Briefly, an efficient and scalable processor device is disclosed that uses multi-value voltages for operands, results, and signaling. An array of cells is arranged in rows and columns, and one or more multi-value operands are used to select a cell from the array. A row driver may be used to select a row of cells, and a column driver is used to select a particular column from the selected row. Once a particular cell is selected, a voltage value associated with that cell is passed as an output, which is typically a multi-value result. The multi-value processor is constructed such that the row driver and column driver can be substantially identical, and have a structure that enables significant circuit reuse, provides substantial reduction in size for a circuit layout, has increased layout symmetry, simple scalability, and advantageous power conservation.