An interactive incremental synthesis flow for integrated circuit design includes performing a full synthesis [304] of a circuit design to produce an elaborated netlist and synthesized netlist; based on the elaborated netlist and synthesized netlist, automatically partitioning [306] the circuit design into invariant cone regions whose functionality do not change during synthesis; and performing an incremental synthesis [308] each time a change is made to the circuit design. The incremental synthesis includes performing an elaboration [318] of a module of the design containing the change; performing a structural comparison [310] between the elaborated netlist and a modified elaborated netlist to identify modified invariant cones containing the change; synthesizing [312] gates contained in the modified invariant cones; deleting from the synthesized netlist the gates contained within the modified invariant cones that have been changed; and inserting [314] the synthesized gates corresponding to the modified invariant cones into the synthesized netlist.