Invention Application
- Patent Title: Integrated Circuit Packaging Structure and Method
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Application No.: US16464896Application Date: 2016-11-30
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Publication No.: US20190287909A1Publication Date: 2019-09-19
- Inventor: Chuan Hu , Junjun Liu , Yuejin Guo , Edward Rudolph Prack
- Applicant: Shenzhen Xiuyuan Electronic Technology Co., Ltd.
- Applicant Address: CN Shenzhen, Guangdong
- Assignee: Shenzhen Xiuyuan Electronic Technology Co., Ltd.
- Current Assignee: Shenzhen Xiuyuan Electronic Technology Co., Ltd.
- Current Assignee Address: CN Shenzhen, Guangdong
- International Application: PCT/CN2016/107834 WO 20161130
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/367 ; H01L23/31 ; H01L23/552 ; H01L21/48 ; H01L21/56

Abstract:
An integrated circuit packaging structure and method are provided, the integrated circuit packaging structure includes: a substrate, the substrate being provided with a circuit layer and fine wiring; a chip, the chip being provided with a fine pin and a chip pin; the substrate is provided with at least two of said chips, a chip pin of at least one of said chips being electrically connected to the circuit layer; an insulation patch, the fine wiring being provided on the insulation patch, while the fine pin of the chip is electrically connected to the fine wiring, at least two of said chips being directly electrically connected by means of the fine wiring.
Public/Granted literature
- US11183458B2 Integrated circuit packaging structure and method Public/Granted day:2021-11-23
Information query
IPC分类: