Invention Application
- Patent Title: CONDUCTIVE VIAS
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Application No.: US16390889Application Date: 2019-04-22
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Publication No.: US20190333859A1Publication Date: 2019-10-31
- Inventor: Eric SAUGIER
- Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
- Priority: FR1853657 20180426
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L23/498 ; H01L21/768

Abstract:
The disclosure concerns a semiconductor chip, which may be an interposer, having conductive through vias having a parallelepipedal shape.
Public/Granted literature
- US10978400B2 Conductive vias Public/Granted day:2021-04-13
Information query
IPC分类: