- 专利标题： MEMORY CONFIGURED TO GENERATE A DATA VALUE FROM A DATA LINE CONNECTED TO MORE THAN ONE STRING OF SERIES-CONNECTED MEMORY CELLS
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申请号： US16515134申请日： 2019-07-18
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公开(公告)号： US20190341115A1公开(公告)日： 2019-11-07
- 发明人: Tommaso Vali , Kenneth J. Eldredge , Frankie F. Roohparvar , Luca De Santis
- 申请人： MICRON TECHNOLOGY, INC.
- 申请人地址： US ID BOISE
- 专利权人： MICRON TECHNOLOGY, INC.
- 当前专利权人： MICRON TECHNOLOGY, INC.
- 当前专利权人地址： US ID BOISE
- 主分类号： G11C16/26
- IPC分类号： G11C16/26 ; G11C16/08 ; G11C7/10 ; G06N3/04 ; G06N3/063 ; G11C16/04
摘要：
Memory having an array of memory cells and a controller for access of the array of memory cells that is configured to generate a data value indicative of a level of a property sensed from a data line while applying potentials to control gates of memory cells of more than one string of series-connected memory cells connected to that data line.