- 专利标题: MIDDLE-OF-LINE CONTACTS WITH VARYING CONTACT AREA PROVIDING REDUCED CONTACT RESISTANCE
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申请号: US16361976申请日: 2019-03-22
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公开(公告)号: US20200303264A1公开(公告)日: 2020-09-24
- 发明人: Chanro Park , Kangguo Cheng , Ruilong Xie , Hari Prasad Amanapu
- 申请人: International Business Machines Corporation
- 主分类号: H01L21/8238
- IPC分类号: H01L21/8238 ; H01L21/768 ; H01L29/78 ; H01L29/66 ; H01L29/08 ; H01L23/532 ; H01L27/092
摘要:
A method of forming a semiconductor structure includes forming a first portion of a source/drain contact over a source/drain region of a fin-type field-effect transistor (FinFET), the source/drain region being formed over a fin providing a channel region of the FinFET and being adjacent a gate spacer surrounding a gate region of the FinFET. The method also includes forming a first interlayer dielectric (ILD) layer over the first portion of the source/drain contact, the gate spacer and the gate region, and forming a second ILD layer over the first ILD layer. The method further includes forming a second portion of the source/drain contact over the first portion of the source/drain contact in a first opening in the first ILD layer, and forming a third portion of the source/drain contact over the second portion of the source/drain contact in a second opening in the second ILD layer. The second opening is larger than the first opening.