Invention Application
- Patent Title: GENERATING ERROR CHECKING DATA FOR ERROR DETECTION DURING MODIFICATION OF DATA IN A MEMORY SUB-SYSTEM
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Application No.: US16510559Application Date: 2019-07-12
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Publication No.: US20210011799A1Publication Date: 2021-01-14
- Inventor: Ning Chen , Juane Li
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G06F3/06
Abstract:
A request to store a first data is received. The first data and a first error-checking data are received. The first error-checking data can be based on a cyclic redundancy check (CRC) operation of the first data. A second data is generated by removing a portion of the first data. A second error-checking data of the second data is generated by using the first error-checking data and the removed portion of the first data.
Public/Granted literature
- US11080132B2 Generating error checking data for error detection during modification of data in a memory sub-system Public/Granted day:2021-08-03
Information query
