Aspects of the present disclosure generally relate to multi-mode regulators. For example, the multi-mode regulator may include a first transistor having a first terminal coupled to an input voltage and a second terminal coupled to an output of the regulator, a second transistor having a first terminal coupled to the second terminal of the first transistor and a second terminal coupled to a reference potential, pulse width modulation (PWM) control logic having outputs coupled to gates of a first transistor and a second transistor, one or more error amplifiers, and a switch with a first terminal coupled to the gate of the first transistor and a second terminal coupled to the output of one of the one or more error amplifiers. By selectively configuring one or more components of the multi-mode regulator, the regulator may operate according to either a linear regulation mode or a switching regulation mode.