Invention Application
- Patent Title: SEMICONDUCTOR PACKAGE WITH IMPROVED BOARD LEVEL RELIABILITY
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Application No.: US17460352Application Date: 2021-08-30
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Publication No.: US20220115303A1Publication Date: 2022-04-14
- Inventor: Chin-Chiang Chang , Yin-Fa Chen , Shih-Chin Lin
- Applicant: MEDIATEK INC.
- Applicant Address: TW Hsin-Chu
- Assignee: MEDIATEK INC.
- Current Assignee: MEDIATEK INC.
- Current Assignee Address: TW Hsin-Chu
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L23/31 ; H01L23/00

Abstract:
A semiconductor package includes a die attach pad, a plurality of lead terminals positioned about the die attach pad and disposed along side edges of the semiconductor package, a semiconductor die mounted on the die attach pad, a molding compound encapsulating the plurality of lead terminals and the semiconductor die, and at least one dummy lead disposed in a corner region of the semiconductor package between the plurality of lead terminals.
Public/Granted literature
- US11869831B2 Semiconductor package with improved board level reliability Public/Granted day:2024-01-09
Information query
IPC分类: