A decision feedback equalizer including: a first input latch configured to generate a first output signal from first data received by the first input latch, wherein the first input latch includes: a first sub-circuit configured to receive the first data and a reference voltage, compare the first data and the reference voltage, and generate first internal signals having different transition timings according to a result of the comparison between the first data and the reference voltage; and a second sub-circuit configured to receive, as first feedback, a second output signal, which corresponds to second data received by the first latch earlier than the first data, and generate the first output signal, which compensates for a difference between the transition timings of the first internal signals, based on the first feedback.