Invention Application
- Patent Title: CONDUCTIVE PVD STACK-UP DESIGN TO IMPROVE RELIABILITY OF DEPOSITED ELECTRODES
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Application No.: US17649167Application Date: 2022-01-27
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Publication No.: US20220151094A1Publication Date: 2022-05-12
- Inventor: Jiahui Liang , Anirban Das , Jungyup Kim , Martin Melcher , Srinivasan Varadharajan , Wolf Oetting
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Main IPC: H05K5/06
- IPC: H05K5/06 ; C23C14/06 ; C23C14/14 ; G04G17/08 ; H05K5/00 ; H05K5/02 ; G09F9/30 ; G04G17/02

Abstract:
An electronic device can include a housing component that can define an interior surface and an exterior surface of the device, a metallic film deposited on the interior surface and extending at least partially onto the exterior surface, and a ceramic film deposited on the exterior surface and at least partially over a portion of the metallic film on the exterior surface. The ceramic film can be in electrical communication with a portion of the metallic film deposited on the interior surface to form an electrical pathway from the exterior surface to the interior surface.
Public/Granted literature
- US11641724B2 Conductive PVD stack-up design to improve reliability of deposited electrodes Public/Granted day:2023-05-02
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