Invention Application
- Patent Title: MEMORY BUFFER WITH DATA SCRAMBLING AND ERROR CORRECTION
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Application No.: US17696818Application Date: 2022-03-16
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Publication No.: US20220277780A1Publication Date: 2022-09-01
- Inventor: Christopher HAYWOOD , David WANG
- Applicant: Rambus Inc.
- Applicant Address: US CA San Jose
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA San Jose
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G06F11/10 ; G06F11/07

Abstract:
A method for operating a DRAM device. The method includes receiving in a memory buffer in a first memory module hosted by a computing system, a request for data stored in RAM of the first memory module from a host controller of the computing system. The method includes receiving with the memory buffer, the data associated with a RAM, in response to the request and formatting with the memory buffer, the data into a scrambled data in response to a pseudo-random process. The method includes initiating with the memory buffer, transfer of the scrambled data into an interface device.
Public/Granted literature
- US11854658B2 Memory buffer with data scrambling and error correction Public/Granted day:2023-12-26
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