SPLIT PIXEL ARCHITECTURE FOR IMAGE PROCESSING
Abstract:
An example image processor for processing pixels includes processing circuitry configured to determine that a first subset of input bits of a current pixel are the same as a first subset of input bits of a previously processed pixel, selectively bypass processing the first subset of input bits through a first pipeline based on the determination, output a first subset of output bits of the previously processed pixel as a first subset of output bits of the current pixel based on the determination, and merge the first subset of output bits of the current pixel with a second subset of output bits of the current pixel generated through a second pipeline from a second subset of input bits of the current pixel.
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