Invention Application
- Patent Title: POWER LIMITING SYSTEM AND METHOD FOR A LOW NOISE AMPLIFIER OF A FRONT END INTERFACE OF A RADIO FREQUENCY COMMUNICATION DEVICE
-
Application No.: US17241220Application Date: 2021-04-27
-
Publication No.: US20220345098A1Publication Date: 2022-10-27
- Inventor: Luigi Panseri
- Applicant: Silicon Laboratories Inc.
- Applicant Address: US TX Austin
- Assignee: Silicon Laboratories Inc.
- Current Assignee: Silicon Laboratories Inc.
- Current Assignee Address: US TX Austin
- Main IPC: H03F3/45
- IPC: H03F3/45 ; H04B1/40

Abstract:
A power limiting system and method for a low noise amplifier of a front end interface of a radio frequency communication device. A voltage regulator provides a source voltage to the low noise amplifier having a nominal voltage level that optimizes linearity of the low noise amplifier while a power level of a radio frequency input signal provided to an input of the low noise amplifier does not exceed a predetermined power level threshold. Detection circuitry detects when the power level of a radio frequency input signal exceeds the predetermined power level threshold and provides an adjust signal indicative thereof to the voltage regulator to reduce the source voltage below the nominal voltage level.
Public/Granted literature
Information query