An array substrate includes connecting leads, a signal channel region extending in a first direction, a first power voltage lead, and a second power voltage lead. Any one of the signal channel region includes at least two control region columns extending in the first direction, and any one of the control region columns includes a plurality of control regions arranged along the first direction. Any one of the control regions includes a pad connecting circuit and a first pad group for bonding a microchip, the first pad group is electrically connected to the first power voltage lead. The pad connection circuit includes a plurality of second pad groups, and is provided with a first end electrically connected to the first pad group, and a second end electrically connected to the second power voltage lead.