Invention Application
- Patent Title: MEMORY ARRAY HAVING CONNECTIONS GOING THROUGH CONTROL GATES
-
Application No.: US17872511Application Date: 2022-07-25
-
Publication No.: US20220359554A1Publication Date: 2022-11-10
- Inventor: Toru Tanzawa , Tamotsu Murakoshi , Deepak Thimmegowda
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Main IPC: H01L27/11556
- IPC: H01L27/11556 ; H01L29/66 ; H01L29/792 ; G11C16/04 ; H01L27/11529 ; H01L27/11548 ; H01L27/11573 ; H01L27/11575 ; H01L27/11582 ; H01L27/11521 ; H01L27/11568
Abstract:
Some embodiments include apparatuses and methods having a substrate, a memory cell string including a body, a select gate located in a level of the apparatus and along a portion of the body, and control gates located in other levels of the apparatus and along other respective portions of the body. At least one of such apparatuses includes a conductive connection coupling the select gate or one of the control gates to a component (e.g., transistor) in the substrate. The connection can include a portion going through a portion of at least one of the control gates.
Information query
IPC分类:
