A device includes signal processing circuits, a RAM, and RAM management circuitry. The signal processing circuits produce output data signals as a function of current and past values of sensor data signals. The RAM is organized into a set of RAM sections storing sensor data signal values. The RAM management circuitry has a buffer accessible by the plurality of signal processing circuits, and manages storage and retrieval of data in the RAM sections independently of one another by executing sets of memory operations. A set of memory operations includes a read operation, during which past values of sensor data signals are read from a section of the RAM and stored in the buffer, and a write operation, during which current values of sensor data signals are written into the section of the RAM read during the read operation.