A voltage level detector includes a voltage divider that generates a first division voltage and a second division voltage. A first comparator compares any one of the first and second division voltages with a reference. A second comparator compares the other of the first and second division voltages with the reference. A first switch converts a connection path between the first and second division voltages and the first and second comparators based on a clock signal. A determination circuit determines, based on a first comparison signal and a second comparison signal, whether the voltage level detector is normal. A second switch converts a connection path between the first and second comparison signals and input terminals of the determination circuit based on the clock signal.