Invention Application
- Patent Title: BURIED PAD FOR USE WITH GATE-ALL-AROUND DEVICE
-
Application No.: US17331356Application Date: 2021-05-26
-
Publication No.: US20220384598A1Publication Date: 2022-12-01
- Inventor: Guo-Huei Wu , Pochun Wang , Chih-Liang Chen , Li-Chun Tien
- Applicant: Taiwan Semiconductor Manufacturing Company Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company Ltd.
- Current Assignee Address: TW Hsinchu
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/06

Abstract:
A semiconductor structure includes an isolation structure formed on a substrate, a gate-all-around transistor structure formed on the isolation structure, a via electrically coupled to a gate terminal of the gate-all-around transistor structure, and a buried conductive pad formed within the isolation structure and electrically coupled to the via. The buried conductive pad can extend through the isolation structure in two dimensions, such as in both a vertical dimension and a horizontal dimension. The semiconductor structure can provide advantages in terms of routing flexibility, among other possible advantages.
Public/Granted literature
- US12027598B2 Buried pad for use with gate-all-around device Public/Granted day:2024-07-02
Information query
IPC分类: