Invention Application
- Patent Title: COMPUTE IN MEMORY ARCHITECTURE AND DATAFLOWS FOR DEPTH-WISE SEPARABLE CONVOLUTION
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Application No.: US17367151Application Date: 2021-07-02
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Publication No.: US20230004350A1Publication Date: 2023-01-05
- Inventor: Ren LI
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Main IPC: G06F7/523
- IPC: G06F7/523 ; G06F3/06 ; G06F7/50

Abstract:
Certain aspects of the present disclosure provide a method, including: storing a depthwise convolution kernel in a first one or more columns of a CIM array; storing a fused convolution kernel in a second one or more columns of the CIM array; storing pre-activations in one or more input data buffers associated with a plurality of rows of the CIM array; processing the pre-activations with the depthwise convolution kernel in order to generate depthwise output; modifying one or more of the pre-activations based on the depthwise output to generate modified pre-activations; and processing the modified pre-activations with the fused convolution kernel to generate fused output.
Public/Granted literature
- US12056459B2 Compute in memory architecture and dataflows for depth-wise separable convolution Public/Granted day:2024-08-06
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