PACKAGE FOR STRESS SENSITIVE COMPONENT AND SEMICONDUCTOR DEVICE
Abstract:
In a described example, an apparatus includes: a first semiconductor die with a component on a first surface; a second semiconductor die mounted on a package substrate and having a third surface facing away from the package substrate; a solder seal bonded to and extending from the first surface of the first semiconductor die flip chip mounted to the third surface of the second semiconductor die, the solder seal at least partially surrounding the stress sensitive component; a first solder joint formed between the solder seal and the third surface of the second semiconductor die; a second solder joint formed between solder at an end of the post connect and the third surface of the second semiconductor die; and a mold compound covering the second surface of the first semiconductor die, a portion of the second semiconductor die, and an outside periphery of the solder seal.
Public/Granted literature
Information query
Patent Agency Ranking
0/0