Invention Application
- Patent Title: SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREFOR
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Application No.: US17786488Application Date: 2020-12-16
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Publication No.: US20230008518A1Publication Date: 2023-01-12
- Inventor: Ji-Hyung LEE
- Applicant: AMOSENSE CO.,LTD
- Applicant Address: KR Cheonan-si, Chungcheongnam-do
- Assignee: AMOSENSE CO.,LTD
- Current Assignee: AMOSENSE CO.,LTD
- Current Assignee Address: KR Cheonan-si, Chungcheongnam-do
- Priority: KR10-2019-0168175 20191216
- International Application: PCT/KR2020/018390 WO 20201216
- Main IPC: H01L23/373
- IPC: H01L23/373 ; H01L23/498 ; H01L21/48 ; H01L23/00
Abstract:
A semiconductor package of the present invention comprises a base plate, an insulating substrate, and a lead frame, wherein the base plate is made of a metallic material including Cu and Be—Cu. The present invention can ensure bonding reliability and thus prevent performance degradation of semiconductor devices.
Information query
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