Invention Publication
- Patent Title: VOLTAGE REGULATOR WITH SATURATION PREVENTION
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Application No.: US18089433Application Date: 2022-12-27
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Publication No.: US20230152828A1Publication Date: 2023-05-18
- Inventor: Rinu Mathew , Harikrishna P , Venkatesh Kadlimatti
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Main IPC: G05F1/56
- IPC: G05F1/56 ; H03F3/45

Abstract:
In described examples, a low dropout voltage regulator includes an input voltage terminal, a resistive element, first and second transistors, an output terminal, a differential amplifier, and first and second saturation prevention circuits. The resistive element is coupled between the input voltage terminal and a gate of the first transistor. The output terminal is coupled to the drain of the first transistor and the source of the second transistor. A first input of the differential amplifier receives a reference voltage, and a second input is coupled to the output terminal. The first saturation prevention circuit provides a first clamp current to the differential amplifier output if the gate-source voltage of the first transistor is less than a first threshold voltage. The second saturation prevention circuit provides a second clamp current to the differential amplifier output if the gate-source voltage of the second transistor is greater than a second threshold voltage.
Information query
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