A nonvolatile memory device including a first semiconductor structure including a first semiconductor substrate, a memory cell area including a plurality of memory cells disposed on the first semiconductor substrate, and a first metal pad disposed on the memory cell area; a second semiconductor structure including a second semiconductor substrate, a page buffer disposed on the second semiconductor substrate, and a second metal pad bonded to the first metal pad; and a third semiconductor structure including a third semiconductor substrate, a buffer memory and peripheral circuits disposed on the third semiconductor substrate, and a third metal pad connected to the peripheral circuits, wherein the page buffer includes a plurality of vertical transistors including a source area, a channel area, and a drain area sequentially stacked in a first direction, and the first semiconductor structure to third semiconductor structure are connected in the first direction.