Invention Publication
- Patent Title: MEMORY PERFORMANCE DURING PROGRAM SUSPEND PROTOCOL
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Application No.: US18104897Application Date: 2023-02-02
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Publication No.: US20230176972A1Publication Date: 2023-06-08
- Inventor: Sundararajan N. Sankaranarayanan , Eric Lee
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- The original application number of the division: US17465033 2021.09.02
- Main IPC: G06F12/0815
- IPC: G06F12/0815 ; G06F3/06 ; G06F12/02

Abstract:
Systems and methods are disclosed including a processing device operatively coupled to memory device. The processing device perform operations comprising receiving, from a memory sub-system controller, a first read command and a second read command; determining that the memory device is in a suspended state; and responsive to determining that a first address range specified by the first read command does not overlap with a second address range specified by the second read command, issuing, to the memory device, the first read command and the second read command collectively.
Information query
IPC分类: