A display device comprises: a panel driving unit comprising panel driving circuitry; a display panel including a plurality of pixels; and a processor configured to control the panel driving unit, wherein: the processor is configured to: control the panel driving unit so that gate signals are sequentially output to a plurality of gate lines one gate line at a time, to process, in a first mode, image data in a first driving frequency, and control the panel driving unit so that the gate signals are output to the plurality of gate lines at least two gate lines at a time, to process, in a second mode, the image data in a second driving frequency higher than the first driving frequency; wherein, in the second mode, the respective gate lines output to the plurality of gate lines at least two gate lines at a time can have output timings that differ from each other.