Invention Publication
- Patent Title: Method for Forming a Semiconductor Device
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Application No.: US18063991Application Date: 2022-12-09
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Publication No.: US20230197831A1Publication Date: 2023-06-22
- Inventor: Boon Teik Chan , Hans Mertens , Eugenio Dentoni Litta
- Applicant: IMEC VZW
- Applicant Address: BE Leuven
- Assignee: IMEC VZW
- Current Assignee: IMEC VZW
- Current Assignee Address: BE Leuven
- Priority: EP 215638.4 2021.12.17
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
A method is provided for forming a semiconductor device. The method includes: forming a device layer stack on a substrate, the device layer stack comprising a bottom sacrificial layer and an alternating sequence of upper sacrificial layers and channel layers; forming a sacrificial gate structure; etching through at least the upper sacrificial and channel layers of the device layer stack while using the sacrificial gate structure as an etch mask; forming a sacrificial spacer covering end surfaces of the upper sacrificial and channel layers; while the sacrificial spacer masks the end surfaces of the upper sacrificial and channel layers, further etching the device layer stack to remove the bottom sacrificial layer and thereby form a cavity in the device layer stack; forming a dielectric layer in the cavity, wherein forming the dielectric layer comprises depositing and then etching back a dielectric bottom material to a level below a bottom-most one of the channel layers; removing the sacrificial spacer; forming recesses and forming inner spacers in the recesses; and forming source and drain regions by epitaxially growing semiconductor material on the end surfaces of the channel layers.
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