- 专利标题: CACHE MEMORY ARCHITECTURE AND MANAGEMENT
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申请号: US17385257申请日: 2021-07-26
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公开(公告)号: US20230023314A1公开(公告)日: 2023-01-26
- 发明人: Michael Scharland , Mark Halstead , Rong Yu , Peng Wu , Benjamin Yoder , Kaustubh Sahasrabudhe
- 申请人: EMC IP Holding Company LLC
- 申请人地址: US MA Hopkinton
- 专利权人: EMC IP Holding Company LLC
- 当前专利权人: EMC IP Holding Company LLC
- 当前专利权人地址: US MA Hopkinton
- 主分类号: G06F12/0802
- IPC分类号: G06F12/0802 ; G06F13/20
摘要:
Aspects of the present disclosure relate to data cache management. In embodiments, a storage array's memory is provisioned with cache memory, wherein the cache memory includes one or more sets of distinctly sized cache slots. Additionally, a logical storage volume (LSV) is established with at least one logical block address (LBA) group. Further, at least one of the LSV's LBA groups is associated with two or more distinctly sized cache slots based on an input/output (IO) workload received by the storage array.
公开/授权文献
- US11599461B2 Cache memory architecture and management 公开/授权日:2023-03-07
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