- 专利标题: CALIBRATION METHOD FOR PHASE-LOCKED LOOPS AND RELATED CIRCUIT
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申请号: US18192285申请日: 2023-03-29
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公开(公告)号: US20230327677A1公开(公告)日: 2023-10-12
- 发明人: Davide Nicolo Fortunato , Antonino Calcagno , Marco Vinciguerra , Angelo Scuderi , Gaetano Cosentino
- 申请人: STMicroelectronics S.r.I.
- 申请人地址: IT Agrate Brianza (MB)
- 专利权人: STMicroelectronics S.r.I.
- 当前专利权人: STMicroelectronics S.r.I.
- 当前专利权人地址: IT Agrate Brianza (MB)
- 优先权: IT 2022000007268 2022.04.12
- 主分类号: H03L7/099
- IPC分类号: H03L7/099
摘要:
A voltage-controlled oscillator in a phase-locked loop circuit is calibrated via a dichotomous search in a set of candidate frequency bands via a sequence of subsequent halving steps that produce reduced subsets of the set of candidate frequency bands. The reduced subsets have respective upper bound values and lower bound values, as well as central values. The central value of the subset resulting from the halving step of index i in the sequence is a function of the average of the upper bound value and the lower bound value of the subset resulting from the halving step of index i−1 in the sequence.
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