- 专利标题: APPARATUS WITH RESPONSE COMPLETION PACING
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申请号: US18049973申请日: 2022-10-26
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公开(公告)号: US20230393750A1公开(公告)日: 2023-12-07
- 发明人: Ying Huang , Mark Ish
- 申请人: Micron Technology, Inc.
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 主分类号: G06F3/06
- IPC分类号: G06F3/06
摘要:
Methods, apparatuses and systems related to response completion pacing for latency control are described. The apparatus may utilize response completion pacing to dynamically control timing of output communications to the host. In some embodiments, the memory device can include a ready response queue that temporarily stores the data retrieved from a backend portion or a storage portion of the memory device. The apparatus can include logic coupled to the ready response queue and configured to communicate/send the data in the ready response queue according to a cadence period. In some embodiments, the logic can further dynamically adjust a storage capacity of the ready response queue and/or the cadence period.
公开/授权文献
- US12050776B2 Apparatus with response completion pacing 公开/授权日:2024-07-30
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