A frequency converter has a first intermediate circuit arm on which a positive intermediate circuit potential is present during operation of the frequency converter, a second intermediate circuit arm on which a negative intermediate circuit potential is present during operation of the frequency converter, an inverter having a first input terminal and a second input terminal, wherein the inverter has a number of bridge arms, wherein each of the bridge arms has an upper semiconductor switching device and a lower semiconductor switching device, wherein the upper semiconductor switching device and the lower semiconductor switching device are looped-in in series between the first input terminal and the second input terminal, and wherein a connection node of the upper semiconductor switching device and the lower semiconductor switching device forms an output terminal of the inverter. A reactor is looped-in between the first intermediate circuit arm and the first input terminal of the inverter. A shunt resistor is looped-in between the second intermediate circuit arm and the second input terminal of the inverter. An evaluation unit is configured, on the basis of a voltage across the shunt resistor, to detect a ground fault on the upper semi-conductor switching devices of the inverter.